WP5: AMPLIFICATEURS DE PUISSANCE
The PHD work proposed in this WP consists in the study of a design criterion of the type C/(N+I) versus Pdc/N and to come to comparative results for different PA architectures. (Conventional PA architecture with harmonic tuning , and Envelope tracking PA for example). An important attention will be paid to experiments in order to investigate potential impact of dispersive effects that are difficult to analyse theoretically when modulated signal are used. Preliminary investigations for switched mode power amplifiers will be carried out.
Linear and high efficiency Class B GaN PA : High efficiency and linear class B , 10W GaN amplifier based on the implementation of a dynamic gate bias voltage is under development. A time varying gate bias voltage tracking the envelope of the input RF signal is applied around the pinch off point . This technique improves the linearity of class B PA at backed off power levels with minor impact on power added efficiency. Dynamic gate bias circuit is low DC consuming and potentially high bandwidth. Furthermore it is expected that the technique can contribute to mitigate low frequency dispersive effects of power amplifiers.
RF Stress characterisation and modelling of transistors: This study is based on the experience of XLIM in the measurements of microwave voltage and current waveforms at transistor ports. The transistor characterisation under large signal conditions and RF Stress will enable to identify modelling parameters with long time constants capable to predict performance degradations.